This article introduces target- and pattern-specific variables and shows how they can be used to selectively alter options within a build based on the name of a target or targets being built.
But how many GNU Make users are familiar with GNU Make's locally scoped target-specific and pattern-specific variables?
This article introduces target- and pattern-specific variables and shows how they can be used to selectively alter options within a build based on the name of a target or targets being built.
A simple example: target-specific
As always, let's start with a simple example that illustrates the difference between global and local scope in GNU Make. The following Makefile has four targets: all, foo, bar, baz. All four targets are phony; since I'm only interested in illustrating global and local scope I've ignored actually building any files.
all requires that foo and bar be built and bar needs baz. The commands for each target all do the same thing. They print the value of macro VAR using a shell echo.
.PHONY: all foo bar baz
VAR = global scope
all: foo bar
@echo In $@ VAR is $(VAR)
foo:
@echo In $@ VAR is $(VAR)
bar: VAR = local scope
bar: baz
@echo In $@ VAR is $(VAR)
baz:
@echo In $@ VAR is $(VAR)
VAR is initially defined to have the value global scope. That's the value VAR will have anywhere in the Makefile; unless, of course, that value is overriden using a target- or pattern-specific macro.
So illustrate local scope I've redefined VAR to local scope for the rule that creates bar.
A target-specific macro definition is exactly like a normal macro definition (it uses the same =, :=, += and ?= operators) but it is preceded by the name of the target (and its colon) for which the macro should be defined.
In the Makefile above VAR is set to local scope for the bar rule by writing:
bar: VAR = local scope
If you run make on this Makefile you'll get the following output:
In foo VAR is global scope
In baz VAR is local scope
In bar VAR is local scope
In all VAR is global scope
You can clearly see that GNU Make is following its standard depth-first, left-to-right search pattern building foo (it's the first prerequisite of all), then baz (which is a prerequisite of bar which is the second prerequisite of all), then bar and finally all.
And sure enough within the rule for bar the value of VAR is local scope. And, as you expect since there's no local definition of VAR for all and foo, VAR has the value global scope in those rules.
But what about baz. The Makefile output shows that in baz the value of VAR is local scope, yet there was no explicit target-specific definition of VAR for baz.
baz has the same locally scoped macros as bar because baz is a prerequisite of bar. In fact, target-specific variables are defined for a target and all prerequisites of that target and all their prerequisites and so on. A target-specific variable's scope is the entire tree of targets starting from the target for which the variable was defined.
A simple example: pattern-specific
Pattern-specific macros work in a similar manner to target-specific macros, but instead of being defined for a target they are defined for a pattern and then will be applied to all targets that match that pattern.
I've modified the example above so that it includes a pattern-specific macro. The last line says that for any target that begins with f followed by anything (that's the % wildcard) VAR has the value starts with f.
.PHONY: all foo bar baz
VAR = global scope
all: foo bar
@echo In $@ VAR is $(VAR)
foo:
@echo In $@ VAR is $(VAR)
bar: VAR = local scope
bar: baz
@echo In $@ VAR is $(VAR)
baz:
@echo In $@ VAR is $(VAR)
f%: VAR = starts with f
Now if you run make you get the following output:
In foo VAR is starts with f
In baz VAR is local scope
In bar VAR is local scope
In all VAR is global scope
This is the same as above except that in the rule for foo the value of VAR has been set to starts with f by the pattern-specific definition.
It's worth noting that this is unrelated to normal GNU Make pattern rules. The pattern-specific macro definition can be used to change the value of a macro in a normal rule (as above). It can also be used with a pattern rule.
For example, you could change the value of DEBUG to 1 within all %.o files (that could be built using the standard %.o: %.c pattern rule) by writing:
%.o: DEBUG = 1
A practical example
It's not uncommon in a project to have a standard rule for compiling files (perhaps even using the built-in GNU Make rule) and to need to have a slightly different version of that rule for a specific file, or set of files, that otherwise use the same command.
For example, here's a Makefile that builds all the C files in two subdirectories (lib1 and lib2) using a pattern rule.
lib1_SRCS := $(wildcard lib1/*.c)
lib2_SRCS := $(wildcard lib2/*.c)
lib1_OBJS := $(lib1_SRCS:.c=.o)
lib2_OBJS := $(lib2_SRCS:.c=.o)
.PHONY: all
all: $(lib1_OBJS) $(lib2_OBJS)
%.o: %.c
@$(COMPILE.C) -o $@ $<
First the Makefile gets the list of all C files in lib1 in the variable lib1_SRCS and the C files in lib2 in lib2_SRCS and then it converts those to a list of object files to build using a substitution reference to change .c to .o creating lib1_OBJS and lib2_OBJS.
The pattern rule uses the GNU Make built-in variable COMPILE.C to run a compiler that compiles a .c into a .o. The Makefile knows to build all the objects in lib1_OBJS and lib2_OBJS because they are prerequisites of all.
This works fine if all the .c files have the same compilation options.
Now suppose that the C file lib1/special.c requires the -Wcomment option to prevent the compiler from warning about an oddly written comment. Obviously is would be possible to change the value of CPPFLAGS globally by adding
CPPFLAGS += -Wcomment
in the Makefile. But that change affects every compilation and is probably undesirable.
Luckily, a target-specific variable can be used to just alter the value of CPPFLAGS for that single file. By writing
lib1/special.o: CPPFLAGS += -Wcomment
the value of CPPFLAGS will be altered just for the creation of lib1/special.o.
Now suppose that an entire subdirectory requires a special CPPFLAGS option to maximize optimization for speed (the -fast option to gcc, for example).
Here a pattern-specific macro definition is ideal. Adding
lib1/%.o: CPPFLAGS += -fast
does the trick. Any .o files that are built in lib1/ will have the -fast command-line option.
Conclusion
Target-specific and pattern-specific macros are worth reading about because they are a very handy feature of GNU Make when a small change is needed for a limited set of targets.
Further reading can be found in the GNU Make manual sections 'Target-specific Variable Values' (http://www.gnu.org/software/make/manual/make.html#Target_002dspecific) and 'Pattern-specific Variable Values' (http://www.gnu.org/software/make/manual/make.html#Pattern_002dspecific).
And Robert Mecklenburg's 'Managing Projects with GNU Make' book contains an explanation of target-specific variables in Chapter 3 (http://www.oreilly.com/catalog/make3/book/ch03.pdf).
